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DE297 Drive Electronics


(Last Modified: 04 November 2010 06:09:24 PM )

The DE297 is a slightly modified version of the DE248 code.

The files for this version are located on Kodiak (not accessible outside BFE) in the D:\DE248\DE297 directory. Note that the design name is still DE248.

On-FPGA Signal Generator

The FPGA contains a programmable signal generator patterned directly on the generator in the BFE297. This generator is used to produce the signals that go to the BFE297 test board. Writing to this generator via HyperTerminal is essentially identical to writing to the on-chip generators via the SPI (via HyperTerminal).

The signals from the generator are operated on by chip-specific logic to produce the signals that are actually sent to the chip. These signals are routed to bi-directional IO buffers. The tristate control signals for these buffers are located at HR2C. Each bit controls the buffer for one signal according to the following map:

If the bit is set LO then the output is tri-stated and the port pin can be used as an input buffer.

For the BFE297, this port should be configured as follows:

In the DE297 Register Space, registers 0x24 though 0x27 are used to control the signals going to the BFE297. This is in addition to the SPI signals, which are operated normally.

The /Prst signal is the compliment of HR27:b0 and is the only signal derived from this register. Therefore, to control this signal, use the following commands:

The default settings for the signal generator should be adequate for most needs, although to load the defaults the firmware must be reset (press the black button on the Digilent board after configuring the FPGA).

To update a register associated with the signal generator, perform the following tasks:

#> W2600 ! Relax the Write Strobe (unless already relaxed)

#> W24AA ! 'AA' is the register address to be written to

#> W25DD ! 'DD' is the data to be stored in the desired register

#> W2601 ! Assert the Write Strobe

#> W2600 ! Relax the Write Strobe (to be safe)


NOTE: Because there is no physical SPI, if the WS is not LO when either the address or data registers are changed, the result will be an immediate write to the signal generator.

Like the BFE297, the overall period of the signals is controlled by a window counter. The Start and Stop values can be changed using the following registers:

The defaults are to start at 0 and stop at 1610, which is slightly longer than needed to read out the entire array each frame.

The base address of the Control Registers for the signal generator bank is 0xF0.

NOTE: The above assignments may be in the reverse order relative to those used in the on-chip generator. If so, they will be corrected in the next synthesis and (hopefully) this documentation will be updated at the same time.

The base address of the Edge Registers for the signal generator bank is 0x20. Presently five of the signal generator channels are used:

Pgate: Channel 0 (default: Rise = 1, Fall = 50)

Preadout: Channel 1 (default: Rise = 2, Fall = 1600)

Preadout is used to gate the master clock in order to produce Pclk.

Pled : Channel 4 (default: Rise = 0, Fall = 0)

Ptest1 : Channel 5 (default: Rise = 9, Fall = 100)

Ptest2 : Channel 6 (default: Rise = 20, Fall = 100)

Pscope : Channel 7 (default: Rise = 0, Fall = 1)

Pscope does not go to the BFE297 - it is available for producing a scope trigger signal if desired.

SPI Operation

The SPI register map is as follows:

See the DE248 SPI Master Module documentation for more details.

To set up the SPI module for communicating with the BFE297, perform the following sequence:

#> W1000 ! Insures that the Loop Controller is not in control

#> W1310 ! Configure for 16-bit packets

#> W1400 ! Highest speed SCLK possible.

#> W1500 ! Configure for default polarity, default direction, and SPI Mode 0

#> W1601 ! Target only the device attached to SSN[0]

To use the SPI to write to the BFE297, perform the following:

#> W12AA ! 'AA' is the on-chip register address to be written to

#> W11DD ! 'DD' is the data to be stored in the desired register

#> W1001 ! Initiate the SPI transfer

#> W1000 ! De-assert the HOST_Initiate bit

Sync Tip Enable

The S/H in the sync tip generators defaults to the Hold condition. To place it in a tracking mode, write 0x40 to register 0x07 on the BFE297 (after configuring the SPI as described above).

#> W1207

#> W1140

#> W1001

#> W1000

This will change the polarity of the necessary signal (Pd_store). Keep in mind that this register controls the polarity of all eight signals in the signal generator bank, so if any of the other signals need to be inverted be sure to take that into account in determining the necessary data value.

Initialization Script

The following script may be used to perform the initial configuration of the DE297 and BFE297. This should be placed in an ASCII text file and then the Transfer-Send Text File command (NOT the Send File command!) can be used to stream the contents of the file to the DE297.

! Echo/Flow
! Set up SPI
! Reset Chip
! Enable Sync
! Echo/Flow

The first and last commands control the UART Echo and Flow Control configuration. They should be used at the beginning and end of every script file used.


Note that there is a bug in the UART code that results in it not sending back data well when a file is being streamed to it. The data appears to transfer correctly, however. After streaming a file it may be necessary to dump the UART buffers by sending the escape character (hit the ESC key).