XILINX WEBPACK CONFIGURATION
(Last Modified: 04 November 2010 06:09:18 PM )
The WebPack tools can be downloaded for free from Xilinx.
As of this writing, the latest version is i9.2 and can be downloaded from here.
The file size is huge (nearly 6GB), so using the Web Install is the preferred method. It takes a while to install.
Although the tool is free, you will need to register and supply a username and password. (BFE: See the TechWeb)
The purpose of this page is to describe how to get the Verilog source code files combined into a project that can be synthesized and programmed into a part. These steps are specific to the tools that were used.
The firmware was developed using the Xilinx Webpack tools. This is a free tool available from Xilinx.
The present version (release is far too formal a word) of the firmware was developed using release 7.1.03i. The following steps are for that release and may or may not translate well to other releases.
The following table contains the values of the project property fields that were used. The first four or five are the critical ones.
| Property Name | Value |
| Device Family | Spartan2 |
| Device | xc2s200 |
| Package | pq208 |
| Speed Grade | -6 |
| Top-Level Module Name | HDL |
| Synthesis Tool | XST (VHDL/Verilog) |
| Simulator | Modelsim |
| Generated Simulation Language | Verilog |
To program the part using iMPACT you must configure the tool in a rather non-intuitive fashion. First, in the "Process View" window within Project Navigator (not iMPACT), scroll down and right click on "Generate Programming File". Then, select the "Startup Options" tab and choose "JTAG Clock" as the value for "FPGA Start-up Clock" property field.
Now double click "Configure Device (iMPACT)" from the bottom of the list in the "Process View" window.
Once iMPACT launches, it will bring up the "Configure Devices" wizard. Don't waste your time - cancel out of this and do the following steps manually:
To program the device:
If you get an error indicating that the ID codes do not match, cycle power on the Digilent board and try again.
If you ever get the feeling that changes you are making to the code are not making it to the FPGA, one possibility is that the configuration file is using the wrong bit file. You can right click on the device icon and choose "Assign New Configuration File..." and select the correct file (be sure it is from the correct directory).